The present invention relates to a semiconductor device in which semiconductor chips are encapsulated by synthetic resin. More particularly, the present invention relates to a semiconductor device in which a plurality of semiconductor chips are provided in one semiconductor package (hereinafter referred to as a package).
Two kinds of semiconductor chips, each function of which is different from each other, for example an SRAM and a flash memory, are encapsulated into two IC packages, each being different from each other respectively in the conventional art. However, the two kinds of semiconductor chips are not limited to the SRAM and the flash memory. Thus, two kinds of semiconductor chips are transported respectively from the semiconductor manufacturer. Under such circumstances, electrical instruments manufacturer who manufactures downsized xe2x80x9cend productsxe2x80x9d purchase the semiconductor chips one by one and mount them on mother boards for end products respectively. Such downsized end product is, for example, a portable telephone and is an electrical apparatus including, for example, semiconductor devices according to the present invention.
Recently, a number of proposals are made in order to reduce an area for mounting packages as electrical instruments are downsized. Accordingly, in conventional art there is a problem that large area for mounting packages is required and that a demand that electrical instruments such as portable telephones are to be downsized is not satisfied since two packages must be mounted one by one respectively when mounting two kinds of semiconductor chips, each function of which is different from each other, as one set.
In order to solve the problem, proposals of a semiconductor device in which a plurality of semiconductor chips are encapsulated in one package are made in for example Japanese Unexamined Patent Publication No. 308058/1989 or in Japanese Unexamined Patent Publication No. 119640/1992. FIG. 4 is a sectional view illustrating conventional DIP.IC (dual inline package IC) in which semiconductor chips are encapsulated by synthetic resin. In FIG. 4, reference numeral 10 denotes a DIP.IC (electronic device); reference numeral 11 denotes a first pellet; reference numeral 12 denotes a second pellet; reference numeral 13 denotes a bonding wire; reference numeral 14 denotes a package in which semiconductor chips are encapsulated by synthetic resin; reference numerals 15a and 15b, each denoting a lead for carrying a tab (hereinafter referred to as tab-supporting lead), the lead is supported by a lead frame; reference numerals 16a and 16b denote tabs; reference numeral 17 denotes a lead; reference numeral 17a denotes an inner lead; reference numeral 17b denotes an outer lead; reference numeral 17c denotes a common inner lead; reference numeral 18 denotes a bonding layer. Tab-supporting leads 15a and 15b are provided in such a manner that tabs 16a and 16b are formed in a shape of a flat rectangular plate, and formed at each top end of the tab 15a and 15b, the tab-supporting leads being provided so that the tab-supporting leads are located on one straight line. Thus, each of tab-supporting leads 15a and 15b supports each of the tabs 16a and 16b respectively in one body.
In the conventional example, a plurality of pellets 11 and 12 are provided for an electric circuit for prescribed functions. The pellets are bonded on the tabs 16a and 16b respectively and encapsulated by resin into a single package. Thus, an electrical device is formed in one unit system with multiple functions.
In a semiconductor device in which a plurality of semiconductor chips are provided in one package, it is designed that an area for mounting a semiconductor device is reduced. However, since a lead frame which is used in fabricating a package includes a plurality of die pads (tab), there is a problem that in manufacturing steps many defects such as inclination of die pad from the plane on which the lead frame exists occurs.
In a semiconductor device proposed in the above-mentioned Unexamined Japanese Patent Publication No. 308058/1989, each of tab-supporting leads 15a and 15b, each of which is carrying tab 16a or 16b supported by a lead frame is provided at only one side of each tab respectively.
Thus, in the stability of the tab, there is a problem that the tab tends to incline from the plane on which lead frame exists.
Further, a structure in which two die pads are formed in a lead frame in such a manner that the pattern of the die pad is like an island and the pads are connected through an insulating circuit board and a semiconductor chip is provided on the pad respectively is proposed in the above-mentioned Unexamined Japanese Patent Publication No. 119640/1992. However, it is supposed that inclination of the pads occurs since the pad is supported at two points to the outer frame.
The present invention is achieved to solve the above-mentioned problems. The object of the present invention is to provide a semiconductor device so that on a mother board an area for mounting semiconductor device can be largely reduced.
According to the present invention, there is provided a semiconductor device comprising;
two rectangular semiconductor chips, each function of which is different from each other;
two die pads, each of which carries thereon either of the two rectangular semiconductor chips and is electrically isolated from each other;
a plurality of leads for carrying either of the two die pads, each of the plurality of leads being supported by a lead frame and being connected to either of the two die pads;
a plurality of leads for connecting either of the two semiconductor chips with any of outer connection terminals;
a package in which the two semiconductor chips, the two die pads, one portion of each of the leads for carrying and one portion of each of the leads for connecting are encapsulated by synthetic resin so that the two semiconductor chips are packed in a single package;
wherein the leads for carrying are provided at larger side faces of the package and at smaller side faces of the package; and
wherein each of the two die pads is supported at at least three side faces of the package.
Preferably, at each of four side faces of the package at least two leads for carrying either of the two die pads are provided.
Preferably, the lead for carrying is provided in such a manner that the lead for carrying is directed outward at a smaller side face of the package and has an extended portion in the package and is connected to an other lead for carrying directed outward at a larger side face of the package.
Preferably, the lead for carrying is to be connected to an outer connection terminal which is electrically isolated from the two rectangular semiconductor chips.
Preferably, the two rectangular semiconductor chips comprise a flash memory and an SRAM.
In a semiconductor device, high stability and high reproducibility can be achieved and improved throughput in manufacturing steps can be obtained.